See also:
 | - ASPIDA Project - - ASynchronous, open source, Processor IP of the DLX Architecture. Goal: show feasibility to design and deliver asynchronous open IPs in portable, re-usable way. Information, downloads. Open source hardware.
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 | - David R. Kaeli, Professor - - Director of Northeastern University Computer Architecture Research Laboratory, and co-author of Computer Architecture: A Quantitative Approach. Professional information with some links.
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 | - DLX (deLuxe) - - Instructions: R-, I-, J-Types. WinDLX download. WinDLX opcodes. DLX architecture diagram; Assembly examples: division by subtraction.
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 | - DLX Implementation at MSU - - Documents DLX implementation by Microsystems Prototyping Laboratory (MPL), MSU Engineering Research Center; used as design driver to help validate standard cell libraries.
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 | - DLX in VHDL - - VHDL model of processor; most instructions use 5 clock cycles to run, jumps use 3, floating point timing not fully accurate because fp instructions also take 5 cycles to run; description, download.
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 | - DLX Information - - Documents: getting started, instruction set summary and description, simulator manual.
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 | - DLX Instruction Slides - - Tables of instructions, categorized, as PDF slides. By Guy Even, Tel Aviv University. [PDF.
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 | - The DLX Processor - - Class overview with tables (instruction format, set) and diagrams (timing), some other information. By Ethan Miller, University of Maryland.
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 | - DLX Simulation Tools - - Set of tools to build and simulate programs to run on DLX architecture, for exploring an operating system (DLXOS) in a simulated environment. Overview, architecture, OS, simulator, debugger, instructions.
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 | - DLXview - - Interactive visual pipeline simulator using DLX instruction set; operation of pipelined processor is easier to understand than trying to imagine operation from text descriptions; modified and extended from DLXsim. Documents, downloads.
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 | - Implementation of 5-stage DLX Pipeline - - Introductory tutorial with definitions, explanations, examples to show basic pipelining ideas; applet simulation lets users choose instructions to run, and see how pipeline works from direct experience.
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 | - Norman Matloff's DLX Tutorial - - Information on DLX processor simulator and compiler, DLXsim, interactive program, loads assembly programs and simulates operation of computer on them, single-stepping or continuous execution.
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 | - Out of Order Execution - - Master's Thesis: Design and Evaluation of a RISC Processor with a Tomasulo Scheduler. Uses DLX. HTML, PS, GZ, PDF.
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 | - Wikipedia: DLX - - Encyclopedia article with links to many related topics.
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 | - WinDLX - - Program for MS Windows, an assembly interpreter for DLX assembly language; instructions, source code, downloads. By Javier Echaiz, National University of the South.
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 | - Computer Architecture: A Quantitative Approach - - By John L. Hennessy, David A. Patterson; Morgan Kaufmann, 2007, ISBN 9780123704900, 4th edition. Design in quantitative terms, in context of real running systems, not abstract formats; how technology changes in time, empirical constants needed in design. (2007)
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